SERGIO ANTONIO
CUENCA ASENSI
CATEDRATICO/A DE UNIVERSIDAD
Eduardo
Chielle
Publications dans lesquelles il/elle collabore avec Eduardo Chielle (8)
2016
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Hybrid soft error mitigation techniques for COTS processor-based systems
LATS 2016 - 17th IEEE Latin-American Test Symposium
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Reliability on ARM Processors Against Soft Errors Through SIHFT Techniques
IEEE Transactions on Nuclear Science, Vol. 63, Núm. 4, pp. 2208-2216
2015
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Application-Based Analysis of Register File Criticality for Reliability Assessment in Embedded Microprocessors
Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 31, Núm. 2, pp. 139-150
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Overhead reduction in data-flow software-based fault tolerance techniques
FPGAs and Parallel Architectures for Aerospace Applications: Soft Errors and Fault-Tolerant Design (Springer International Publishing), pp. 279-291
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Reliability on ARM processors against soft errors by a purely software approach
Proceedings of the European Conference on Radiation and its Effects on Components and Systems, RADECS
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S-SETA: Selective Software-Only Error-Detection Technique Using Assertions
IEEE Transactions on Nuclear Science
2014
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Efficient metric for register file criticality in processor-based systems
LATW 2014 - 15th IEEE Latin-American Test Workshop
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Tuning software-based fault-tolerance techniques for power optimization
2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014