Publicaciones en las que colabora con FELIPE RESTREPO CALLE (36)

2024

  1. Evaluation of Fault Mitigation Techniques Based on Approximate Computing Under Radiation

    IEEE Transactions on Nuclear Science, Vol. 71, Núm. 8, pp. 1715-1721

2020

  1. An Experimental Comparison of Fault Injection Tools for Microprocessor-based Systems

    21st IEEE Latin-American Test Symposium, LATS 2020

  2. Multi-Threaded Mitigation of Radiation-Induced Soft Errors in Bare-Metal Embedded Systems

    Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 36, Núm. 1, pp. 47-57

2018

  1. SHARC: An efficient metric for selective protection of software against soft errors

    Microelectronics Reliability, Vol. 88-90, pp. 903-908

2017

  1. An Effective Strategy for Selective Hardening of Software

    2017 18TH IEEE LATIN AMERICAN TEST SYMPOSIUM (LATS 2017)

  2. An effective strategy for selective hardening of software

    LATS 2017 - 18th IEEE Latin-American Test Symposium

2016

  1. A hardware-software approach for on-line soft error mitigation in interrupt-driven applications

    IEEE Transactions on Dependable and Secure Computing, Vol. 13, Núm. 4, pp. 502-508

  2. Dependability Evaluation of COTS Microprocessors via On-Chip debugging facilities

    2016 17TH IEEE LATIN-AMERICAN TEST SYMPOSIUM (LATS)

  3. Dependability evaluation of COTS microprocessors via on-chip debugging facilities

    LATS 2016 - 17th IEEE Latin-American Test Symposium

2015

  1. Application-Based Analysis of Register File Criticality for Reliability Assessment in Embedded Microprocessors

    Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 31, Núm. 2, pp. 139-150

  2. Considerations on application of selective hardening based on software fault tolerance techniques

    2015 16th Latin-American Test Symposium, LATS 2015

  3. Reducing implicit overheads of soft error mitigation techniques using selective hardening

    FPGAs and Parallel Architectures for Aerospace Applications: Soft Errors and Fault-Tolerant Design (Springer International Publishing), pp. 259-278

  4. Soft error mitigation in soft-core processors

    FPGAs and Parallel Architectures for Aerospace Applications: Soft Errors and Fault-Tolerant Design (Springer International Publishing), pp. 239-258

2014

  1. Efficient Metric for Register File Criticality in Processor-Based Systems

    2014 15TH LATIN AMERICAN TEST WORKSHOP - LATW

  2. Efficient metric for register file criticality in processor-based systems

    LATW 2014 - 15th IEEE Latin-American Test Workshop

  3. Efficient mitigation of data and control flow errors in microprocessors

    IEEE Transactions on Nuclear Science, Vol. 61, Núm. 4, pp. 1590-1596