TECNOLOGIA INFORMATICA Y COMPUTACION
Departamento
FELIPE
RESTREPO CALLE
Investigador en el periodo 2014-2014
Publicaciones en las que colabora con FELIPE RESTREPO CALLE (36)
2024
-
Evaluation of Fault Mitigation Techniques Based on Approximate Computing Under Radiation
IEEE Transactions on Nuclear Science, Vol. 71, Núm. 8, pp. 1715-1721
2023
-
Evaluation of fault injection tools for reliability estimation of microprocessor-based embedded systems
Microprocessors and Microsystems, Vol. 96
2020
-
An Experimental Comparison of Fault Injection Tools for Microprocessor-based Systems
21st IEEE Latin-American Test Symposium, LATS 2020
-
Multi-Threaded Mitigation of Radiation-Induced Soft Errors in Bare-Metal Embedded Systems
Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 36, Núm. 1, pp. 47-57
2019
-
Evaluating Impact on Motivation and Academic Performance of a Game-Based Learning Experience Using Kahoot
Frontiers in Psychology, Vol. 10
-
Softerror mitigation for multi-core processors based on thread replication
LATS 2019 - 20th IEEE Latin American Test Symposium
-
Softerror mitigation for multi-core processors based on thread replication
2019 20TH IEEE LATIN AMERICAN TEST SYMPOSIUM (LATS)
2018
-
SHARC: An efficient metric for selective protection of software against soft errors
Microelectronics Reliability, Vol. 88-90, pp. 903-908
2017
-
An Effective Strategy for Selective Hardening of Software
2017 18TH IEEE LATIN AMERICAN TEST SYMPOSIUM (LATS 2017)
-
An effective strategy for selective hardening of software
LATS 2017 - 18th IEEE Latin-American Test Symposium
2016
-
A hardware-software approach for on-line soft error mitigation in interrupt-driven applications
IEEE Transactions on Dependable and Secure Computing, Vol. 13, Núm. 4, pp. 502-508
-
Dependability Evaluation of COTS Microprocessors via On-Chip debugging facilities
2016 17TH IEEE LATIN-AMERICAN TEST SYMPOSIUM (LATS)
-
Dependability evaluation of COTS microprocessors via on-chip debugging facilities
LATS 2016 - 17th IEEE Latin-American Test Symposium
2015
-
Application-Based Analysis of Register File Criticality for Reliability Assessment in Embedded Microprocessors
Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 31, Núm. 2, pp. 139-150
-
Considerations on application of selective hardening based on software fault tolerance techniques
2015 16th Latin-American Test Symposium, LATS 2015
-
Reducing implicit overheads of soft error mitigation techniques using selective hardening
FPGAs and Parallel Architectures for Aerospace Applications: Soft Errors and Fault-Tolerant Design (Springer International Publishing), pp. 259-278
-
Soft error mitigation in soft-core processors
FPGAs and Parallel Architectures for Aerospace Applications: Soft Errors and Fault-Tolerant Design (Springer International Publishing), pp. 239-258
2014
-
Efficient Metric for Register File Criticality in Processor-Based Systems
2014 15TH LATIN AMERICAN TEST WORKSHOP - LATW
-
Efficient metric for register file criticality in processor-based systems
LATW 2014 - 15th IEEE Latin-American Test Workshop
-
Efficient mitigation of data and control flow errors in microprocessors
IEEE Transactions on Nuclear Science, Vol. 61, Núm. 4, pp. 1590-1596